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Cadence

Principal Product Validation Engineer

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  • 我要分享
  • 40万-60万/年
  • ?#26412;?/i>
  • |
  • 5年以上
  • |
  • 硕士
  • |
  • 全职

职位诱惑: 年终奖金,五险一金,福利好,老板nice,年底双薪,股票期权,技术领先,成长空间大

发布时间: 2019-07-19发布

职位描述

Principal Product Validation Engineer
Location: Beijing
 
We are in search of a self-motivated and rich experienced Principal Product Validation Engineer to join the Cadence Liberate characterization team.
The Liberate Characterization Suite delivers the industry’s most comprehensive and robust solution for the characterization and validation of customer's foundation IP — from standard cells, I/Os, and complex multi-bit cells, to memories and mixed-signal blocks. Its patented Inside View technology delivers better correlation to silicon by improving library throughput and ensuring timing, power, noise, and statistical coverage of customer's IP.
The successful candidate will help to develop software validation plans to improve the products’ quality, also lead junior PV team members to achieve group test plans. The responsibilities include designing and implementing products test plans, clearly and regularly communicating with management and technical support colleagues, testing and maintaining Liberate products to ensure strong functionality and optimization.
 
The position are intended for MS or PhD students in EE or CS. The requirements are:
- 5+ years of experience in product validation of EDA software
- Project leading experiences
- Proficient in TCL/Python/Perl/Shell scripts, with good scripting skills
- Ability to work independently and multi-tasks efficiently
- Experiences in Spectre/Hspice circuit simulation, library characterization, static timing analysis and statistics analysis are strong plus

职位发布者

cadence hr

Sr.Manager&BP

7天

简历处理用时

90%

简历及时处理率

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